Intel has processed over one million 300mm wafers using High‑NA EUV lithography, achieving this milestone in less than 2.5 years since the first tool was assembled. The company currently operates two ASML Twinscan EXE:5000 prototypes and at least one EXE:5200B production system. In February 2025, the cumulative count was around 30,000 wafers; by September 2026, it surpassed 1 million. For context, ASML reported in April 2026 that the entire global installed base had processed over 500,000 wafers, meaning Intel's single‑site volume exceeds that of all other users combined.

Intel 18A has completed High‑NA EUV process qualification, and the technology is now in production for Panther Lake Core Ultra processors. In July 2026, ASML confirmed Intel as the first company to achieve high‑volume logic‑chip shipment using High‑NA EUV, with multiple layers qualified and yields on par with the existing NXE EUV platform.

However, the reticle size limitation remains a real constraint. Intel is pushing the industry to adopt a 6×12‑inch large‑format reticle, which would enable full‑field exposure (26×33mm) in a single shot. But switching reticle formats would require upgrading blank substrates, deposition, etch, metrology, cleaning, pellicles, writing tools, and handling systems – plus potential redesigns of the High‑NA EUV scanners themselves. ASML's current roadmap shows that High‑NA EUV tools planned for 2033 and beyond still use 6×6‑inch reticles with stitching. Neither ASML nor Intel has confirmed whether existing or future High‑NA systems can be retrofitted for the larger reticle.

ICgoodFind Takeaway:
Intel's 1M‑wafer milestone proves High‑NA EUV is production‑ready and scalable. But the reticle ecosystem is the next frontier – and upgrading it will take years and industry‑wide coordination. For chip buyers, this affects future capacity and cost trajectories.